1. Technical Field
The present disclosure relates to motherboards having a time delay circuit for delaying a power supply on (PSON) signal.
2. Description of Related Art
In a computer system, the micro ATX and ATX specifications recommend a 24-pin main connector interface for power supply. This interface incorporates standard +5V, +12V, 3.3V, 5V standby, and soft-power signals. Proper implementation of PSON#, 5VSB, and PW-OK is required for an ATX-compliant power supply.
PSON# is an active low Transistor-Transistor Logic (TTL) signal that turns on all of the main power rails including 3.3V, 5V, −5V, 12V, and −12V power rails. When this signal is held high by the PC board or left open-circuited, outputs of the power rails should not deliver current and should be held at a zero potential with respect to ground. Power should be delivered to the rails only if the PSON# signal is held at ground potential.
Sometimes, the power button of the computer system is triggered repeatedly in a very short time interval, and the power rails of the power supply do not have time to power down fully, which may cause power up sequence failure.
Therefore, a motherboard having a circuit for delaying the PSON signal to prevent the above described power up/down failure is desired.